Heading3 - vhdl instantiation template, Vhdl instantiation template – Achronix Speedster22i User Macro Guide User Manual
Page 56

I/O Cells
OPAD_DIFFD
Speedster Macro Cell Library
PAGE 39
VHDL Instantiation Template
------------- ACHRONIX LIBRARY ------------
library speedster22i;
use speedster22i.components.all;
------------- DONE ACHRONIX LIBRARY ---------
-- Component Instantiation
OPAD_D_instance_name : OPAD_DIFFD
generic map (location => ““,
iostandard => “LVDS”,
drive => "16",
rstmode => “async”,
rstvalue => “low”,
slew => “slow”,
invert_out => “off”,
open_drain => "false",
pvt_comp => "none”)
port map (pad => user_pad,
padn => user_padn,
din => user_din,
oe => user_oe,
rstn => user_rstn,
clk => user_clk);