Watlow LogicPro - Manual (Page 157)

LogicPro User’s Guide Chapter 10: Function Blocks
Doc.# 28002-00 Rev 3.00 Watlow Anafaze 141
lowest evaluation priority of the input bits in this function
block.
CLR is the SL clear bit. When this bit is True, the register is
cleared of all values. In a Ladder Diagram program, the value
of CLR is determined by the Boolean evaluation of elements
placed between the left power rail and CLR in the function
block. In FBD programs, the value of CLR is determined by
the Variable connected to CLR. If no contacts are placed on the
rung before CLR, the default value of CLR is False. This bit
takes the highest evaluation priority of the inputs in this
function block.
BIT is the SL input bit. This value of this bit is placed in the first
position in the register when a False to True transition of the
shift bit occurs, as long as the clear bit is False. In a Ladder
Diagram program, the value of BIT is determined by the
Boolean evaluation of elements placed between the left power
rail and BIT in the function block. In FBD programs, the value
of BIT is determined by the Variable connected to BIT. If no
contacts are placed on the rung before BIT, the default value of
BIT is False. In this scenario, only zeroes are shifted into the
register.
SIZE is the SL size Variable. The value assigned to this
Variable determines the size of the stack. For this reason,
assign a constant value and do not change this value online.
This Variable should be either a positive INT or LONG Variable
or a constant.
Outputs
Q is the SL output bit. This bit is enabled and passes power
when a bit with a True value is shifted out of the register. The
output bit remains enabled until a bit with a False value is
shifted out of the register or the clear bit is True. When a bit
with a False value is shifted out of the register, the output bit
does not pass power.
Figure 10.21 illustrates how bits are shifted through the SL
function block.
Figure 10.21 Example of How Bits Shift Through
the SL Function Block
Bit Shift Left