Avago Technologies LSI53C1020 - Manual (Page 8)

viii Contents
Version 2.4 Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.
2.4 Ultra320 SCSI Functional Description 2-18
2.4.1 Ultra320 SCSI Features 2-18
2.4.2 SCSI Bus Interface 2-22
2.5 External Memory Interfaces 2-23
2.5.1 Flash ROM Interface 2-23
2.5.2 NVSRAM Interface 2-26
2.6 Serial EEPROM Interface 2-27
2.7 Zero Channel RAID 2-28
2.8 Multi-ICE Test Interface 2-29
Chapter 3 Signal Description
3.1 Signal Organization 3-2
3.2 PCI Bus Interface Signals 3-4
3.2.1 PCI System Signals 3-4
3.2.2 PCI Address and Data Signals 3-5
3.2.3 PCI Interface Control Signals 3-6
3.2.4 PCI Arbitration Signals 3-6
3.2.5 PCI Error Reporting Signals 3-7
3.2.6 PCI Interrupt Signals 3-7
3.3 PCI-Related Signals 3-8
3.4 SCSI Interface Signals 3-9
3.5 Memory Interface 3-12
3.6 Zero Channel RAID (ZCR) Interface 3-13
3.7 Test Interface 3-14
3.8 GPIO and LED Signals 3-16
3.9 Power and Ground Pins 3-16
3.10 Power-On Sense Pins Description 3-18
3.11 Internal Pull-Ups and Pull-Downs 3-22
Chapter 4 PCI Host Register Description
4.1 PCI Configuration Space Register Descriptions 4-1
Vendor ID 4-3
Device ID 4-3
Command 4-3
Status 4-5
Revision ID 4-7
Class Code 4-7