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Tablea.26 lsi53c1020 pci memory [0] registers, A.26, Lsi53c1020 pci memory [0] registers – Avago Technologies LSI53C1020 User Manual

Page 160

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A-4

Register Summary

Version 2.4

Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.

Table A.26

LSI53C1020 PCI Memory [0] Registers

Register Name

Offset

Read/Write

Page

System Doorbell

0x00

Read/Write

4-34

Write Sequence

0x04

Read/Write

4-35

Host Diagnostic

0x08

Read/Write

4-36

Test Base Address

0x0C

Read/Write

4-37

Reserved

0x10–0x2F

Reserved

Host Interrupt Status

0x30

Read/Write

4-40

Host Interrupt Mask

0x34

Read/Write

4-41

Reserved

0x38–0x3F

Reserved

Request Queue

0x40

Read/Write

4-42

Reply Queue

0x44

Read/Write

4-42

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