Avago Technologies LSI53C1020 - Manual (Page 104)

4-26 PCI Host Register Description
Version 2.4 Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.
Register: 0xXX
Message Data
Read/Write
Message Data [15:0]
System software initializes this 16-bit register by writing
to it. The LSI53C1020 sends an interrupt message by
writing a dword to the address held in the
Message
Address and Message Upper Address registers. This reg-
ister forms bits [15:0] of the dword message that the PCI
function passes to the host. The PCI function drives bits
[31:16] of this message to 0x0000.
Register: 0xXX
PCI-X Capability ID
Read Only
PCI-X Capability ID [7:0]
This 8-bit register indicates the type of the current data
structure. This register returns 0x07, indicating the PCI-X
Data Structure.
15 0
Message Data
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
7 0
PCI-X Capability ID
0 0 0 0 0 1 1 1