Lsi53c1020/1020a functional signal grouping, Figure 3.1, Signal organization 3-3 – Avago Technologies LSI53C1020 User Manual
Page 59
Signal Organization
3-3
Version 2.4
Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.
Figure 3.1
LSI53C1020/1020A Functional Signal Grouping
FLSHALE[1:0]/
FLSHCE/
RAMWE[1:0]/
CLK
RST/
AD[63:0]
C_BE[7:0]/
PAR
PAR64
ACK64/
REQ64/
FRAME/
TRDY/
IRDY/
STOP/
DEVSEL/
IDSEL
REQ/
GNT/
PERR/
SERR/
INTA/
ALT_INTA/
MAD[15:0]
SCLK
SD[15:0]
±
SDP[1:0]
±
SCD
±
SIO
±
SMSG
±
SREQ
±
SBSY
±
SATN
±
SRST
±
SSEL
±
DIFFSENS
LSI53C1020/1020A
Test
Interface
SCSI Bus
Interface
System
Address
and Data
Interface
Control
Arbitration
Error
Reporting
Interrupt
Memory
Interface
Interface
SCTRL/
SACK
±
GPIO and LED
Signals
MADP[1:0]
RAMCE/
SerialDATA
SerialCLK
RAMOE/
TCK_ICE
TMS_ICE
TDI_ICE
TRST_ICE/
RTCK_ICE
TCK_CHIP
TST_RST/
TMS_CHIP
TDI_CHIP
TDO_CHIP
IDDTN
SCANEN
GPIO[7:0]
A_LED/
HB_LED/
RBIAS
PCI Bus
BZVDD
TDO_ICE
PCI-Related
Signals
ScanRstDis
DIS_SCSI_FSN/
TESTHCLK
TESTACLK
TM
SCAN_MODE
TN
DIS_PCI_FSN/
SPARE[13:12]
ZCR_EN/
IOPD_GNT
ZCR Interface
BZRESET