Avago Technologies LSI53C1020 User Manual
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Preface
Version 2.4
Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.
v2.0
4/2002
Added the register summary appendix.
Updated the electrical characteristics.
Updated the Index.
Prelim v1.0
2/2002
Updated the description of Fusion-MPT architecture in Chapter 1.
Updated the External Memory Interface descriptions in Chapter 2.
Added the Test Interface description to Chapter 2.
Added the Zero Channel RAID interface description to Chapters 2 and 3.
Updated the MAD Power-On Sense pin description in Chapter 3.
Updated the signal descriptions and lists to include the ZCR-related pins.
Updated the electrical and environmental characteristics in Chapter 5.
Removed SE SCSI electrical/timing characteristics figures from Chapter 5.
Removed SCSI timing information from Chapter 5 and referred readers to
the SCSI spec.
Removed the PSBRAM interface and all related information.
Adv v0.1
4/2001
Initial release of document.
Revision
Date
Remarks