Avago Technologies LSI53C1020 - Manual (Page 107)

PCI Configuration Space Register Descriptions 4-29
Version 2.4 Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.
Register: 0xXX
PCI-X Status
Read/Write
Reserved [31:30]
This field is reserved.
Received Split Completion Error Message 29
The LSI53C1020 sets this bit upon receipt of a split com-
pletion message if the split completion error attribute bit
is set. Write a one (1) to this bit to clear it.
Designed Maximum Cumulative Read Size [28:26]
These read-only bits indicate a number greater than or
equal to the maximum cumulative size of all outstanding
burst memory read transactions for the LSI53C1020 PCI
device. The PCI function must report the smallest value
that correctly indicates its capability. The LSI53C1020
reports 0b001 in this field to indicate a designed maxi-
mum cumulative read size of 2 Kbytes.
Designed Maximum Outstanding
Split Transactions
[25:23]
These read-only bits indicate a number greater than or
equal to the maximum number of all outstanding split
transactions for the LSI53C1020 PCI device. The PCI
function must report the smallest value that correctly indi-
cates its capability. The LSI53C1020 reports 0b100 in
this field to indicate that the designed maximum number
of outstanding split transactions is eight.
Designed Maximum Memory Read
Byte Count
[22:21]
These read-only bits indicate a number greater than or
equal to the maximum byte count for the LSI53C1020
device. The PCI function uses this count to initiate a
sequence with one of the burst memory read commands.
The PCI function must report the smallest value that cor-
rectly indicates its capability. The LSI53C1020 reports
31 30 29 28 26 25 23 22 21 20 19 18 17 16 15 8 7 3 2 0
PCI-X Status
0 0 0 0 0 1 1 0 0 1 0 0 0 0 1 1 X X X X X X X X X X X X X 0 0 0