Avago Technologies LSI53C1020 - Manual (Page 149)

Pinout Information and Mechanical Drawings 5-29
Version 2.4 Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.
Table 5.23 contains the pinout for the LSI53C1020A 384-pin package,
sorted by BGA position.
Table 5.23 LSI53C1020A 384-Pin Pinout by BGA Position
N23 VDD_IO
N24 AD62
N25 AD63
N26 PAR64
P1 VSSC
P2 SDP0+
P3 SDP0-
P4 VDD_IO
P11 VSS_IO
P12 VSS_IO
P13 VSS_IO
P14 VSS_IO
P15 VSS_IO
P16 VSS_IO
P23 VDD_IO
P24 C_BE6/
P25 C_BE5/
P26 C_BE4/
R1 SD7+
R2 SD7-
R3 SD6-
R4 SD6+
R11 VSS_IO
R12 VSS_IO
R13 VSS_IO
R14 VSS_IO
R15 VSS_IO
R16 VSS_IO
R23 VSSC
R24 VDDC
R25 PCI5VBIAS
R26 C_BE7/
T1 SD5+
T2 SD5-
T3 SD4-
T4 SD4+
T11 VSS_IO
T12 VSS_IO
T13 VSS_IO
T14 VSS_IO
T15 VSS_IO
T16 VSS_IO
T23 GPIO1
T24 GPIO0
T25 JtagMode
T26 VSSC
U1 SD3+
Ball Signal Ball Signal
A2 NC
A3 NC
A4 VSSA
A5 VDDC
A6 SCAN_MODE
A7 RAMCE/
A8 MADP1
A9 MAD13
A10 MAD10
A11 RAMWE1/
A12 MAD3
A13 MAD5
A14 MAD6
A15 RAMWE0/
A16 FLSHALE0/
A17 GPIO2
A18 GPIO7
A19 GPIO4
A20 AD32
A21 AD36
A22 AD40
A23 AD42
A24 NC
A25 NC
B1 NC
B2 VSS_IO
B3 NC
B4 SCLK
B5 VSSC
B6 TM
B7 DIS_PCI_FSN/
B8 SPARE12
B9 MAD14
B10 MAD11
B11 HB_LED/
B12 MAD2
B13 MAD4
B14 MAD7
B15 FLSHCE/
B16 FLSHALE1/
B17 SerialCLK
B18 VSSC
B19 VDDC
B20 AD33
B21 AD37
B22 AD41
B23 NC
B24 NC
B25 VSS_IO
B26 NC
C1 NC
C2 NC
C3 VSS_IO
C4 NC
C5 VDDA
C6 TN
C7 VSSC
C8 NC
C9 MAD15
C10 MAD12
C11 MAD9
C12 MAD0
C13 VSSC
C14 VSSC
C15 VDDC
C16 GPIO3
C17 SerialDATA
C18 GPIO5
C19 PCI5VBIAS
C20 AD35
C21 AD39
C22 AD43
C23 NC
C24 VSS_IO
C25 NC
C26 NC
D1 NC
D2 NC
D3 NC
D4 VSS_IO
D5 VSS_IO
D6 VDD_IO
D7 VDDC
D8 SPARE13
D9 MADP0
D10 VDD_IO
D11 MAD8
D12 MAD1
D13 VDD_IO
D14 VDD_IO
D15 RAMOE/
D16 A_LED/
D17 VDD_IO
D18 GPIO6
D19 SCANEN
D20 AD34
D21 AD38
D22 VDD_IO
D23 VSS_IO
D24 NC
D25 NC
D26 NC
E1 DIFFSENS
E2 NC
E3 NC
E4 VSS_IO
E23 VDD_IO
E24 NC
E25 NC
E26 NC
F1 SD10+
F2 SD11-
F3 SD11+
F4 VDD_IO
F23 NC
F24 NC
F25 NC
F26 NC
G1 SD8+
G2 SD9-
G3 SD9+
G4 SD10-
G23 NC
G24 ZCR_EN/
G25 NC
G26 NC
H1 SREQ+
H2 SIO-
H3 SIO+
H4 SD8-
H23 AD45
H24 AD44
H25 AD46
H26 AD47
J1 SSEL+
J2 SCD-
J3 SCD+
J4 SREQ-
J23 AD49
J24 AD48
J25 AD50
J26 AD51
K1 SMSG-
K2 SMSG+
K3 SSEL-
K4 VDD_IO
K23 VDD_IO
K24 AD52
K25 PCI5VBIAS
K26 AD53
L1 SACK-
L2 SACK+
L3 SRST+
L4 SRST-
L11 VSS_IO
L12 VSS_IO
L13 VSS_IO
L14 VSS_IO
L15 VSS_IO
L16 VSS_IO
L23 AD55
L24 AD54
L25 AD56
L26 AD57
M1 SATN+
M2 VDDC
M3 SBSY+
M4 SBSY-
M11 VSS_IO
M12 VSS_IO
M13 VSS_IO
M14 VSS_IO
M15 VSS_IO
M16 VSS_IO
M23 AD59
M24 AD58
M25 AD60
M26 AD61
N1 RBIAS
N2 VDDBIAS
N3 SATN-
N4 VDD_IO
N11 VSS_IO
N12 VSS_IO
N13 VSS_IO
N14 VSS_IO
N15 VSS_IO
N16 VSS_IO
Ball Signal Ball Signal Ball Signal