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Table5.11 12 ma output signals – a_led/, hb_led, 12 ma output signals – a_led/, hb_led – Avago Technologies LSI53C1020 User Manual

Page 126

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5-6

Specifications

Version 2.4

Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.

Table 5.9

Input Signals

1

– CLK, DIS_PCI_FSN/, DIS_SCSI_FSN/, GNT/, IDDTN,

IDSEL, IOPD_GNT, BZRESET, BZVDD, JtagMode, SCANEN, SCAN_MODE,
SCLK, TCK_CHIP, TCK_ICE, TESTACLK, TM, TESTHCLK, TDI_CHIP,
TDI_ICE, TMS_CHIP, TMS_ICE, TN, TRST_ICE/, TST_RST/, ZCR_EN/

Symbol

Parameter

Min

Max

Unit

Test Conditions

V

IH

Input high voltage

2.0

VDD + 0.5

V

V

IL

Input low voltage

0.3

0.8

V

I

IN

3-state leakage

10

10

µ

A

V

PIN

= 0 V,

VDD + 0.5 V

I

PULL-UP

Pull current

25

µ

A

1. Do not place pulls on CLK, GNT/, IDSEL, RST/, and SCLK. The pull information given does not

apply to these signals.

Table 5.10

8 mA Output Signals

1

– ALT_INTA/, RAMWE[1:0]/, FLSHALE[1:0]/,

FLSHCE/, INTA/, RAMOE/, RAMCE/, REQ/, RTCK_ICE, SerialCLK,
TDO_CHIP, TDO_ICE

Symbol

Parameter

Min

Max

Unit

Test Conditions

V

OH

Output high voltage

2.4

VDD

V

8 mA

V

OL

Output low voltage

VSS

0.4 VDD

V

8 mA

I

OZ

3-state leakage

10

10

µ

A

V

PIN

= 0 V, 3.6 V

I

PULL-UP

Pull current

25

µ

A

1. Do not place pulls on REQ/ and SERR/. The pull information given does not apply to these signals.

Table 5.11

12 mA Output Signals – A_LED/, HB_LED/

Symbol

Parameter

Min

Max

Unit

Test Conditions

V

OH

Output high voltage

2.4

VDD

V

12 mA

V

OL

Output low voltage

VSS

0.4 VDD

V

12 mA

I

OZ

3-state leakage

10

10

µ

A

V

PIN

= 0 V, 3.6 V

I

PULL-UP

Pull current

25

µ

A

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