Host diagnostic, Host diagnos, Register: 0x08 – Avago Technologies LSI53C1020 User Manual
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PCI Host Register Description
Version 2.4
Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.
Register: 0x08
Host Diagnostic
Read/Write
The
register contains diagnostic controls and status
information. This register can only be written when bit 7 of this register
is set.
Reserved
[31:8]
This field is reserved.
Diagnostic Write Enable
7
The LSI53C1020 sets this read-only bit when the host
writes the correct Write I/O Key to the
register. The LSI53C1020 clears this bit when the host
writes a value other than the Write I/O Key to the
register.
Flash Bad Signature
6
The LSI53C1020 sets this bit if the IOP ARM966E-S pro-
cessor encounters a bad Flash signature when booting
from Flash ROM. The LSI53C1020 also sets the DisARM
bit (bit 1 in this register) to hold the IOP ARM processor
in a reset state. The LSI53C1020 maintains this state
until the PCI host clears both the Flash Bad Signature
and DisARM bits.
Reset History
5
The LSI53C1020 sets this bit if it experiences a
Power-On Reset (POR), PCI Reset, or TestReset/. A host
driver can clear this bit.
Diagnostic Read/Write Enable
4
Setting this bit enables access to the
and
registers.
31
8
7
6
5
4
3
2
1
0
Host Diagnostic
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
X
0