Avago Technologies LSI53C1020 - Manual (Page 56)

2-30 Functional Description
Version 2.4 Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.
Table 2.6 20-Pin Multi-ICE Header Pinout
Pin Number Signal Pin Number Signal
1 VDD 2 VDD
3 TRST_ICE/
1
1. The designer must connect a 4.7 k
Ω
resistor from this signal to 3.3 V.
4 VSS
5 TDI_ICE
1
6 VSS
7 TMS_ICE
1
8 VSS
9 TCK_ICE
1
10 VSS
11 RTCK_ICE 12 VSS
13 TDO_ICE 14 VSS
15 No Connect 16 VSS
17 No Connect 18 VSS
19 No Connect 20 VSS