Avago Technologies LSI53C1020 - Manual (Page 19)

Benefits of the Fusion-MPT Architecture 1-5
Version 2.4 Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.
64 Kbyte stripes. These stripes are interleaved round-robin, so that
the combined storage space is composed alternately of stripes from
each disk.
The Fusion-MPT architecture provides the interface to the SCSI
chip/firmware to enable the Integrated Striping and Integrated Mirroring
features. LSI Logic’s CIM interface software is used to continuously
monitor IM volumes and IS volumes and to report status and error
conditions as they arise.
A BIOS-based configuration utility is provided to create the IM and IS
volumes. A DOS-based configuration utility is also provided for use on
the manufacturing floor.
For more information about the Integrated RAID solution, see the
Integrated RAID User’s Guide, DB15-000292.
1.2 Benefits of the Fusion-MPT Architecture
The Fusion-MPT architecture provides an open architecture that is ideal
for SCSI, Fibre Channel, and other emerging interfaces. The I/O interface
is interchangeable at the system and application level; embedded
software uses the same device interface for SCSI and Fibre Channel
implementations, just as application software uses the same storage
management interfaces for SCSI and Fibre Channel implementations.
LSI Logic provides Fusion-MPT device drivers that are binary compatible
between Fibre Channel and Ultra320 SCSI interfaces.
The Fusion-MPT architecture improves overall system performance by
requiring only a thin device driver, which offloads the intensive work of
managing SCSI I/Os from the system processor to the LSI53C1020.
Developed from the proven SDMS™ solution, the Fusion-MPT
architecture delivers unmatched performance of up to 50,000 Ultra320
SCSI I/Os per second with minimal system overhead or device
maintenance. The use of thin, easy-to-develop, common OS device
drivers accelerates time to market by reducing device driver development
and certification times.
The Fusion-MPT architecture provides an interrupt coalescing feature.
Interrupt coalescing allows an I/O controller to send multiple reply
messages in a single interrupt to the host processor. Sending multiple