Receive clock phase adjustment, Receive data phase adjustment, Receive clock jitter – Comtech EF Data C5 User Manual
Page 74: Receive doppler/plesiochronous buffer, Buffering center
Specifications
C5/K1/K3 Integrated Satellite Terminal System
2–40
Rev. 0
2.5.1.8
Receive Clock Phase Adjustment
The receive clock phase can be set by the operator to NORMAL or INVERTED.
2.5.1.9
Receive Data Phase Adjustment
The receive data phase can be set by the operator to NORMAL or INVERTED.
2.5.1.10
Receive Clock Jitter
The receiver has a clock jitter gain of < 2.0 dB. The absolute jitter on the output clock is
< 4% RMS of 1/data rate at 7.0 dB
E
b
/N
0
.
2.5.1.11
Receive Doppler/Plesiochronous Buffer
The receive Doppler buffer can be configured by the operator to the following modes:
1. Bypass (Buffer set to minimum depth for emulation of previous products).
2. Selectable: 32 to 262,144 bits, in 16 bit steps.
3. Selectable: 0 to 50 ms, in 1 ms steps.
4. When running framed data, the buffer will slip in configured plesiochronous steps.
2.5.1.12 Buffering
Center
The operator can set the buffer to 50%. The modem will automatically set the buffer to
50% after receive signal acquisition or a buffer overflow/underflow.