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Decoder, Sequential decoder, Figure a-4. sequential decoder block diagram – Comtech EF Data C5 User Manual

Page 266

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Options

C5/K1/K3 Integrated Satellite Terminal System

A–22

Rev. 0

A.2.2 Decoder

A.2.2.1 Sequential

Decoder

The sequential decoder is used in closed network applications, typically in Frequency
Division Multiple Access (FDMA) satellite communications systems. The sequential
decoder is a FAST option.

Refer to Figure A-4 for a block diagram of the sequential decoder.

MICRO-

COMPUTER

BUS

MICROCOMPUTER

INTERFACE

SYNDROME SHIFT

REGISTER A

DESCRAMBLER

V.35

RECEIVE
DATA

DECODER

DETECTOR

DIFFERENTIAL

CHANNEL BER

OUTPUT
BUFFER

PARITY

GENERATOR

SYNDROME SHIFT

REGISTER B

AMBIGUITY
RESOLVER

SYNDROME INPUT

GENERATOR

INPUT

BUFFER

RECEIVE

CLOCK

RCVR

DDS

LOCK

DETECT

ADDRESS

GENERATOR

COSTAS

PROCESSOR

I CHANNEL

Q CHANNEL

VCXO

SWEEP

TIMING AND

CONTROL

PROCESS

CLOCK

IF

AGC

CONTROL

CLOCK

RECOVERY

Figure A-4. Sequential Decoder Block Diagram

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