Reed˚solomon decoder, A.3.1.4 reed-solomon decoder – Comtech EF Data C5 User Manual
Page 280
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C5/K1/K3 Integrated Satellite Terminal System
A–36
Rev. 0
A.3.1.4 Reed-Solomon
Decoder
Refer to Figure A-12 for a block diagram of the Reed-Solomon decoder section.
The Reed-Solomon decoder section includes the following circuits:
! Parallel/Serial Converter
! RAM Deinterleaver
! Reed-Solomon Codec (decoder section)
! Serial/Parallel Converter
! Synchronous Descrambler
DMXDAT
(SERIAL)
JP2
PARALLEL
SYNCHRONOUS
RS
SERIAL
RAM
UNIQUE WORD
RXSATDAT
(SERIAL)
JP2
RXSATCLK
JP2
DETECTOR
CONVERTER
PARALLEL
TO
DEINTERLEAVER
CODEC
(DECODER SECTION)
DEINTERLEAVER
DESCRAMBLER
CONVERTER
TO SERIAL
DMXCLK
JP2
ADDRESS
GENERATOR
RS TIMING
CONTROLLER
U3
U3
U3
U3
U3
U3
U2
U1
Figure A-12. Reed-Solomon Decoder Section Block Diagram
The data and clock signals come from the demultiplexer on the interface PCB, and are
sent to the Reed-Solomon decoder section.
The data is sent through a serial/parallel converter. Because it was block interleaved by
the encoder, the data must pass through a de-interleaver with the same depth as the
interleaver used on the encoder. The de-interleaver is synchronized by the detection of
the unique words, which are placed at the end of each page by the interleaver on the
encoder.
Once the de-interleaver is synchronized to the incoming data, the data is reassembled into
its original sequence, in accordance with the INTELSAT-308 Rev. 6B specification. The
data is then sent to the Reed-Solomon outer decoder.