Rockwell Automation 57C650 AutoMax Programming Executive Version 3.8 - Manual (Page 151)

10Ć3 AutoMax Processor Overview
10.4 Battery BackĆUp
The contents of AutoMax Processor RAM (read/write memory) are
preserved through power failures by the onĆboard battery backĆup.
As long as the LED labeled BAT. OK" on the front of the Processor
module is on, the battery is functional and 115 VAC is available to the
power supply in the rack. Should the system lose power, the
onĆboard battery can supply power to the Processor module for a
minimum of 42 days. Note that the battery backup is designed to
maintain the contents of RAM only. It is not a source of
unĆinterruptible power.
If you expect power to be off for long intervals during initial startĆup
and debugging, you should disconnect the battery backup on the
Processor module and make use of the superĆcapacitor also on
board each Processor module. Typically, the superĆcapacitor is
capable of retaining memory for 10 hours at a time with no battery
present. This procedure will avoid draining the Processor's battery
backĆup.
Reserved Battery Status Variables
Five preĆassigned variables are available for use in all application
tasks to test the status of the onĆboard battery of AutoMax Processor
and Common Memory modules. These common boolean variables
will have the value 1 if the battery is functional and 0 if the battery is
not functional. The variables are named according to the Processor
whose battery is being tested. BATTERYSTATUS0@ is used for the
Processor or Common Memory module in slot 0.
BATTERYSTATUS1@ is used for the Processor in slot 1, etc. up to
slot 4.
10.5 Module Watchdog Circuity
Each Processor module has a local watchdog timer which must be
reset by the operating system within a specified interval or the
Processor will execute a STOP ALL and all I/O modules in the local
rack will be reset (initialized to 0, FALSE, or OFF). The I/O modules in
the rack will also be reset if you remove a Processor module from a
singleĆProcessor configuration. All UDC tasks in the rack will also be
stopped, and most UDC registers will be reset. See 10.12 for more
information.
In a multiĆProcessor configuration, there is a system watchdog timer
located on the Common Memory module in slot 0 in addition to the
watchdog on each individual Processor module. If the system
watchdog is allowed to expire, the Common Memory module will
generate an interrupt, and one of the Processors in the rack will issue
a STOP ALL and reset the I/O modules in the rack. All Processor
modules in the rack will then shut down.
Each UDC module also has a local watchdog timer. If the watchdog
timer on a UDC module expires, the UDC module will generate an
interrupt, and one of the Processors in the rack will issue a STOP
ALL.