26 shift clock frequency setting (39h), 27 irqnc (3fh) – NEC PD17062 User Manual
Page 87
87
µ
PD17062
9.26 SHIFT CLOCK FREQUENCY SETTING (39H)
9.27 IRQNC (3FH)
IRQNC is an interrupt request flag that indicates the interrupt request state.
When an interrupt request is generated, the flag is set to 1. When the request is accepted (interrupt is made),
the flag is reset to 0.
The interrupt request flag can be read and written by the program. Hence, if 1 is written, an interrupt by
software can be generated. If 0 is written, the interrupt hold status can be released. The IRQNC flag becomes
0 upon reset.
b
3
b
2
b
1
b
0
SIO0CK3
SIO0CK2
SIO0CK0
39H
SIO0CK1
0
0
0
1
1
0
1
1
100 kHz
200 kHz
500 kHz
1 MHz
Fixed at 0
Internal clock frequency
Flag name
Bit position
Interrupt source
IRQNC
b
0
INT
NC
pin
IRQBTM0
b
1
Clock timer
IRQVSYN
b
2
V
SYNC
pin
IRQSIO0
b
3
Serial interface