NEC PD17062 - Manual (Page 80)

80
µ
PD17062
9.11 TIMER CARRY (17H)
9.12 SERIAL INTERFACE WAIT CONTROL (18H)
9.13 IEGNC (1FH)
The IEGNC flag is used for selecting the interrupt detection edge of the INT NC pin and V SYNC pin.
When the flag is set to 0, an interrupt occurs at a rising edge. When the flag is set to 1, an interrupt occurs
at a falling edge.
b 3 b 2 b 1 b 0
17H
Exclusive flag for reading timer carry
0 0 0 BTM0CY
This flag is set according to the selected time base,
and reset when the timer carry is read.
b 3 b 2 b 1 b 0
18H
Setting of wait timing
0
1
SBACK SIO0NWT SIO0WRQ1 SIO0WRQ0
0 0
0 1
1 0
1 1
2-wire bus mode Serial I/O mode
Does not wait Does not wait
Waits when the clock falls with the contents
of the clock counter being 8
Waits when the clock falls with the contents
of the clock counter being 9
Waits when the clock falls with the contents
of the clock counter being 8 after detection
of the start condition
Waits when the contents of the
clock counter become 9
Waits when the contents of the
clock counter become 9
Not to be set
Wait setting
Acknowledgement at 2-wire bus mode
Forced wait
Wait released
b 3 b 2 b 1 b 0
0 IEGVSYN IEGNC
1FH
0
0
1
0
1
Interrupt occurs at the rising edge of the V
SYNC
pin
Interrupt occurs at the falling edge of the V SYNC pin
Interrupt occurs at the rising edge of the INT
NC
pin
Interrupt occurs at the falling edge of the INT NC pin