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Reset, 1 reset block configuration – NEC PD17062 User Manual

Page 171

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171

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PD17062

14. RESET

The reset function is used to initialize device operation.

14.1 RESET BLOCK CONFIGURATION

Fig. 14-1 shows the configuration of the reset block.

Device reset is divided into reset by turning on V

DD

(power-on reset or V

DD

reset), and reset by CE pin (CE

reset).

The power-on reset block consists of a voltage detection circuit that detects the voltage applied to the V

DD

pin, a power failure detection circuit, and a reset control circuit.

The CE reset block consists of a circuit that detects the rising edge of the signal input to the CE pin, and

a reset control circuit.

Fig. 14-1 Reset Block

X

OUT

X

IN

V

DD

CE

Power-on clear signal (POC)

Reset signal

IRES

RES

RESET

STOP instruction

R
S

Q

Selector

Timer carry FF

Timer FF block

Power failure detection block

Scaler

BTM0CY
flag read

STOP
instruction

Voltage
detection
circuit

Control register
System register
Stack
Program counter

Forced halt by
timer carry FF

Rising edge
detection
circuit

Timer carry
disable FF

Reset

control

circuit