NEC PD17062 - Manual (Page 198)

198
µ
PD17062
15.4 GENERAL-PURPOSE INPUT PORT (P0D)
15.4.1 Configuration
The following explains the configuration of the input port.
(1) P0D (P0D
3
, P0D
2
, P0D
1
, P0D
0
pins)
15.4.2 Example of Using Input Port (P0D)
Input data can be read by executing an instruction, such as the SKT instruction, to read the contents of the
port register for each pin.
When a high level signal is input to each pin of the port register, 1 is read. When a low level signal is input
to each pin of the port register, 0 is read.
When a write instruction, such as the MOV instruction, is executed, the port register remains as is.
15.4.3 Notes on Using Input Port (P0D)
P0D is internally pulled down when being used as a general-purpose port.
15.4.4 State of Input Port (P0D) upon Reset
(1) At power-on reset
All I/O ports are set as general-purpose input ports.
(2) At CE reset
All I/O ports are set as general-purpose input ports.
(3) At clock stop
All I/O ports are set as general-purpose input ports.
The RESET signal, output upon clock stop, prevents the current drain from increasing due to noise from
the input buffer, as explained in Section 15.4.1.
P0D is pulled down internally.
(4) During halt state
The previous state is retained.
V DD
RESET
ADC selection signal
Write
instruction
To A/D converter
High on-state resistor
Port register
(1 bit)
Read
instruction Input latch