NEC PD17062 - Manual (Page 59)

59
µ
PD17062
Table 8-2 Modification of Data Memory Address by Index Register and
Data Memory Row Address Pointer
M ; Data memory address BANK ; Bank register
(M) ; Contents of data memory address (BANK) ; Contents of bank register
m ; Data memory address excluding banks IX ; Index register
m R ; Data memory row address (IX) ; Contents of index register
R ; General-purpose register address IXH ; Bits b
10
-b
8
of index register
(R) ; Contents of general-purpose register address IXM ; Bits b
7
-b
4
of index register
r ; General-purpose register column address IXL ; Bits b 3 -b 0 of index register
RP ; General-purpose register pointer MP ; Data memory row address pointer
(RP) ; Contents of general-purpose register address (MP) ; Contents of data memory row address pointer
b
3
b
2
b
1
b
0
b
2
b
1
b
0
b
3
b
2
b
1
b
0
b
3
b
2
b
1
b
0
b
2
b
1
b
0
b
3
b
2
b
1
b
0
b
3
b
2
b
1
b
0
b
2
b
1
b
0
b
3
b
2
b
1
b
0
IXE MPE
0 0
0 1
1 0
1 1
(RP) r (BANK) m (BANK) m
R
(R)
(MP) (R)
BANK
r
(BANK) m R
(MP)
(R) Logical OR
(IXH)
(R)
OR Logical
(IX)
ADD
ADDC
SUB
SUBC
AND
OR
XOR
SKE
SKGE
SKLT
SKNE
SKT
SKF
LD
ST
MOV
m
m, #n4
r m
m, #n4
m, #n4
m, #n
m, #n4
r m
@ r m
General-purpose register address specified by r
R
Data memory address specified by m
M
Indirect transfer address specified by @r
@R
Row
address
Column
address
Bank
Row
address
Column
address
Bank
Row
address
Column
address
Bank
Address-modified instructions
Addition/subtraction
Logical operation
Comparison
Discrimi-
nation
Transfer
Same as
above
Same as
above
Same as
above
Same as
above
Same as
above
Indirect transfer address
m
(IXM)