NEC PD17062 User Manual

Page 130

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PD17062

11.9.3 Interrupt Level Restriction by Address Stack Register

The return address at control return from interrupt processing is automatically saved in the address stack

The address stack register can use the six levels from ASR0 to ASR5 as described in Chapter 4. Because

the interrupt sources are the INT

pin, timer, V

SYNC

pin, and serial interface, the multiple interrupt level is

unlimited when the address stack register is used only for interrupts.

However, because the address stack register is also used to save the return address at subroutine calling,

multiple interrupt levels are limited according to the levels of the address stack register used for subroutine

calling.

For example, if four levels are used for subroutine calling, only two levels of the multiple interrupts shown

in Fig. 11-10 can be used.

Fig. 11-10 Address Stack Register Operation

ASR0

ASR1

ASR2

ASR3

ASR4

ASR5

ASR6

ASR7

Ч Ч Ч Ч

Undefined

MAIN

Ч Ч Ч Ч

Undefined

SUB1

MAIN

Ч Ч Ч Ч

Undefined

SUB2

SUB1

MAIN

Ч Ч Ч Ч

Undefined

SUB3

SUB2

SUB1

MAIN

Ч Ч Ч Ч

Undefined

AAA

SUB3

SUB2

SUB1

MAIN

Ч Ч Ч Ч

SUB4

AAA

SUB3

SUB2

SUB1

MAIN

Ч Ч Ч Ч

SUB4

AAA

SUB3

SUB2

SUB1

MAIN

Ч Ч Ч Ч

Undefined

Ч Ч Ч Ч

SUB4

AAA

SUB3

SUB2

SUB1

MAIN

Ч Ч Ч Ч

RET

BBB:

SUB4:

AAA:

SUB3:

SUB2:

SUB1:

MAIN:

Level 0 Level 1 Level 2 Level 3 Level 4 Level 5 Level 6 Level 7 Level 8

Stack

pointer

Main routine

Subroutine

Interrupt

Subroutine

Interrupt

Subroutine

Because the contents of the address stack register
(ASR0) are always undefined when the stack pointer
is 0, the return addressof the RET instruction also
becomes undefined.

Address stack