NEC PD17062 - Manual (Page 107)

107
µ
PD17062
Fig. 11-1 Interrupt Block Configuration
3FH 2FH
b
3
b
2
b
1
b
0
b
3
b
2
b
1
b
0
I
R
Q
S
I
O
0
I
R
Q
V
S
Y
N
I
R
Q
B
T
M
0
I
R
Q
N
C
I
P
S
I
O
0
I
R
V
S
Y
N
I
P
B
T
M
0
I
P
N
C
01H
b
3
b
2
b
1
b
0
0
S
P
2 S
P
1 S
P
0
BANK PSW
b
3
b
2
b
1
b
0
b
3
b
2
b
1
b
0
79H 7FH
0 0 C
M
P
C
Y Z I
X
E
System register
Symbol
Address
Bit
Program counter
Address stack register
ASR0
ASR1
ASR5
Control register
IPSIO0
IRQSIO0
VAG
01H
IPVSYN
IRQVSYN
VAG
02H
IPBTM0
IRQBTM0
VAG
03H
IPNC
IRQNC
VAG
04H
Flag
symbol
Name
Interrupt
request
(INTREQ)
Interrupt
permission
(INTPM)
Stack pointer
(SP)
Address
Bit
Serial
inter-
face
V
SYNC
pin
Timer
INT NC
pin
Stack
pointer
Flag
symbol
Interrupt
stack
Interrupt request processing block
Interrupt enable
flip-flop INTE
DI or EI instruction