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1 idcdmaen (00h, b1), 2 sp (01h) – NEC PD17062 User Manual

Page 75

background image

75

µ

PD17062

b

3

b

2

b

1

b

0

0

IDCDMAEN

0

0

00H

0

1

DMA prohibited mode (instruction cycle = 2

s )

DMA mode (instruction cycle = 12

s )

µ

µ

9.1 IDCDMAEN (00H, b

1

)

This flag must be set to enable the operation of IDC.

When the IDCDMAEN flag is set, the mode changes to DMA mode and IDC is enabled. In DMA mode, the

instruction cycle is seen as 12

µ

s. For details, see Chapter 20.

9.2 SP (01H)

SP is a pointer that addresses the stack register.

b

3

b

2

b

1

b

0

0

(SPb

2

)

(SPb

0

)

01H

0

0

0

0

0

1

0

1

0

0

1

1

1

0

0

1

0

1

1

1

0

1

1

1

(SPb

1

)

Level 6

Level 5

Level 4

Level 3

Level 2

Level 1

At reset

Not to be set

SP (stack pointer)