NEC PD17062 - Manual (Page 62)

62
µ
PD17062
8.5.4 For MPE = 1 and IXE = 0 (Diagonal Indirect Transfer)
As shown in Table 8-2, the bank and row address of the data memory address in the indirect side specified
by the general-purpose register are set to the value of the data memory row address pointer only when a
general-purpose register indirect transfer instruction is executed.
Example 1. When the row address of the general-purpose register is 0 for BANK0
MOV MPL, #0101B ; MP
←
00101B
MOV MPH, #1000B ; MPE
←
1
MOV 05H, #8 ; 05H
←
8
MOV @05H, 34H ; Register indirect transfer
When the above instruction is executed, the contents of the data memory at address 34H are
transferred to address 58H of data memory. This means that the MOV @r, m instruction at
MPE = 1 transfers the contents of data memory m to the data memory whose bank and row
addresses are the values of the data memory row address pointer (in the above example,
BANK0, row address 5) and whose column address is specified (in the above case, 58H of
BANK0) by general-purpose register r (in the above case, 8). (See Example 1 in Fig. 8-4.)
Compared to MPE = 0 (Example 2 in Section 8.5.3), the bank and row address of the data
memory address in the indirect side specified by the general-purpose register can be
specified by the data memory row address pointer (in Example 2 of Section 8.5.3, the bank
and row address in the indirect side are the same as those of m). Therefore, specifying MPE
= 1 enables general-purpose register diagonal indirect transfer to be performed.
Similarly, the MOV m, @r instruction becomes as shown in Example 2.
Example 2. When the row address of the general-purpose register is 0 for BANK0
MOV MPL, #0101B ; MP
←
00101B
MOV MPH, #1000B ; MPE
←
1
MOV 0BH, #0EH ; 0BH
←
0EH
MOV 3AH, @05H
(See Example 2 in Fig. 8-4.)