NEC PD17062 - Manual (Page 149)

149
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PD17062
12.5.2 Timer Interrupt Error
As explained in Section 12.4, an interrupt request is accepted each time the timer interrupt pulse goes low,
provided that the interrupt is enabled.
A timer error due to use of a timer interrupt occurs when:
(1) An interrupt request is accepted for the first time after the timer interrupt is enabled.
(2) An interrupt request is accepted for the first time after the timer interrupt pulse interval is switched.
(3) Writing to the IRQBTM0 flag occurs.
These timer error types are illustrated in Fig. 12-9.
Fig. 12-9 Timer Interrupt Error (1/2)
(a) When a timer interrupt is enabled
IRQBTM0
IPBTM0
INTE
FF
EI
DI
t
SET
EI EI EI
# $ %
SET1 IPBTM0
Timer interrupt
pulse
Interrupt pending
Interrupt request
accepted
Interrupt request accepted Interrupt request accepted
At point
#, an interrupt request is accepted immediately when the IPBTM0 flag is set to enable the timer
interrupt.
In the above case, timer error -t SET occurs.
If the EI instruction is executed at point $ to enable interrupts, an interrupt occurs at the negative-going
edge of the timer interrupt pulse at point %.
In the above case, the time error is: -t SET < timer error < 0