NEC PD17062 - Manual (Page 150)

150
µ
PD17062
Fig. 12-9 Timer Interrupt Error (2/2)
(b) When the timer interrupt pulse is switched
EI
#
EI EI EI
%
$
IRQBTM0
IPBTM0
INTE
FF
EI
DI
Internal pulse A
Internal pulse B
Timer interrupt pulse
Interrupt accepted
Timer interrupt
pulse switched
Interrupt accepted
Timer interrupt
pulse switched
Interrupt accepted
Although the timer interrupt pulse is switched to B at #, no interrupt occurs because the timer interrupt
pulse does not go low. Therefore, an interrupt occurs when the interrupt pulse goes low at point
$.
When the timer interrupt pulse is switched to A at point %, the timer interrupt pulse goes low, and the
interrupt request is accepted immediately.
(c) When the IRQBTM0 flag is manipulated
EI EI EI
#
IRQBTM0
IPBTM0
INTE
FF
EI
DI
$
Timer interrupt pulse
Interrupt accepted SET1 IRQBTM0
Interrupt accepted CLR1 IRQBTM0
No interrupt accepted
Interrupt accepted
When the IRQBTM0 flag is set at point #, an interrupt request is accepted immediately.
If the IRQBTM0 flag is reset at the same time the timer interrupt pulse goes low at point
$, the interrupt request
is not accepted.