Artesyn ATCA-9305 User's Manual (May 2014) - Manual (Page 91)

Chapter 4
ATCA-9305 User’s Manual (10009109-07) 91
Management Complex
4.1 MPC8548 Processor
The ATCA-9305 management complex is comprised of the Freescale MPC8548 processor,
CPLD, SDRAM, flash, I
2 C EEPROM, Real-time Clock, and PCI bus interface. Board power-up,
booting and monitoring the Cavium processors, PCI bus arbitration, interrupt servicing,
memory persistence functionality, and other board level management tasks are implemented
using the MPC8548 processor. The MPC8548 stores the Cavium operating system and monitor
code in its local memory and then uses the boot over PCI functionality to bring up the Cavium
processor complexes. The CPLD registers are described in
Chapter 5, Management Processor
CPLD . See Chapter 9, Management Processor Monitor for the Management Processor Monitor.
The management complex connects to the Broadcom Ethernet switch via a 1000BASE-T
Ethernet port. This connection uses the TSEC2 interface operating in SGMII mode. See
Chapter
6, Ethernet Interface, on page 129 .