Figure 9-1, Example mpc8548 monitor start-up display, During the po – Artesyn ATCA-9305 User's Manual (May 2014) User Manual

Page 221: Management processor monitor

Management Processor Monitor

ATCA-9305 User’s Manual (10009109-07)

221

Figure 9-1

Example MPC8548 Monitor Start-up Display

Hardware initialization

Monitor command prompt

U-Boot 1.1.4 (Jan 8 2007 - 16:07:48)1.0

CPU: 8548_E, Version: 2.0, (0x80390020)

Core: E500, Version: 2.0, (0x80210020)

Clock Configuration:

CPU: 999 MHz, CCB: 399 MHz,

DDR: 199 MHz, LBC: 49 MHz

Board: ATCA-9305 ATCA Blade

Emerson Network Power, Embedded Computing Inc.

cPLD Ver: 2

I2C: ready

Clearing ALL of memory

................

DRAM: 512 MB

Testing Top 1M Area of DRAM........PASSED

Relocating code to RAM

FLASH: [4MB@e0000000][4MB@e1000000]8 MB

L2 cache: enabled

In: serial

Out: serial

Err: serial

Ser#: 1096

Diags Mem: PASSED

Diags I2C: PASSED

Diags Flash: PASSED

BootDev: Socket

I-cache enabled

D-cache enabled (write-through)

L2 cache enabled. (L2CTL: 0xa0000000)

(write-through)

IPMC: v0.1.1

DOC: Turbo Mode

Net: eTSEC1, eTSEC2

ATCA-9305 (Mon 1.0)=>