Artesyn ATCA-9305 User's Manual (May 2014) - Manual (Page 101)

Management Complex
ATCA-9305 User’s Manual (10009109-07) 101
The MPC8548 stores the Cavium CN5860 operating system and monitor code in local memory
and then uses the boot over PCI functionality to bring up the CN5860 processor complexes.
4.3.1 PCI Express
The four lane PCIe routes between the MPC8548 and the optional rear transition module (zone
3 connector). PCIe starts at physical address E000,0000
16
.
4.4 I
2
C INTERFACE
The I 2 C interface consists of the MPC8548 initialization EEPROM, user (storage) NVRAM, SO-
CDIMM, and the Real-time Clock (RTC). The two Atmel two-wire serial EEPROMs on the I 2 C
interface consist of the Serial Clock (SCL) input and the Serial Data (SDA) bidirectional lines.
Table 4-4 PCI Device Interrupts and ID Assignments
PCI Device Interrupt IDSEL
Cavium processor 1 IRQ6 PCI_AD11
Cavium processor 2 IRQ5 PCI_AD12
Ethernet switch IRQ4 PCI_AD13
MPC8548 - PCI_AD14
Table 4-5 I
2
C Device Addresses
I 2 C Device Address
MPC8548 Initialization (EEPROM-2) 0xA0
User NVRAM (EEPROM-1) 0xA2
DDR2 SDRAM (SO-CDIMM) 0xA4
M41T00 RTC 0xD0