Artesyn ATCA-9305 User's Manual (May 2014) - Manual (Page 100)

Management Complex
ATCA-9305 User’s Manual (10009109-07) 100
4.2.2.2 4M
The two 4 MB soldered flash devices are used for MPC8548 boot code. This redundant bank
configuration allows booting from either bank in case of corruption in one bank. See
BOOT
DEVICE REDIRECTION (BDR) on page 194 . The SST NOR flash devices are organized as 4Mx8 in a
dual-bank architecture for concurrent read/write operation with hardware and software data
protection schemes. These devices start at physical addresses F380,0000
16
(boot bank 1) and
F3C0,0000
16
(boot bank 2).
4.2.2.3 1 GB(optional)
The ATCA-9305 uses 1 GB of M-Systems DiskOnChip (mDOC H3) NAND flash starting at
physical address FC00,0000
16
for non-volatile RAM storage and True Flash File System (TFFS).
This memory incorporates an embedded flash controller and memory, and includes hardware
protection and security-enabling features, an enhanced programmable boot block enabling
eXecution In Place (XIP) functionality using 16-bit access, user-controlled One Time
Programmable (OTP) partitions, and 6-bit Error Detection Code/Error Correction Code
(EDC/ECC).
4.2.2.4 64 MB
The 64 MB soldered NOR flash starts at physical address F400,0000
16
(bank 3). The 64-Mbit
P33 device provides CN5860 code storage and non-volatile memory.
4.3 PCI
The MPC8548 performs all the functions of a PCI host and monarch, and handles all arbitration
and enumeration functions. PCI starts at physical address 8000,0000
16
.
The PCI bus connects to both Cavium processors, the MPC8548 processor and the Broadcom
Ethernet switch, see
Table 4-4 . All of the devices on the PCI bus can operate at 66 MHz and
perform 64-bit transactions in conventional PCI mode except for the Broadcom switch. The
switch has a 32-bit PCI bus.