Overview – Artesyn ATCA-9305 User's Manual (May 2014) User Manual
Page 38

Overview
ATCA-9305 User’s Manual (10009109-07)
38
Serial Port:
The front panel serial port (MGT CSL) connects to the MPC8548 management processor. The
front panel serial port (OCT1 CSL) connects to the Cavium 1 Processor. The front panel serial
port (OCT2 CSL) connects to the Cavium 2 Processor.
System Management:
This product supports an Intelligent Platform Management Controller (IPMC) based on a
proprietary BMR-H8S-AMCc® reference design from Pigeon Point Systems. The IPMC has an
inter-integrated circuit (I2C) controller to support an Intelligent Management Platform Bus
(IPMB) that routes to the AdvancedTCA connector. The IPMB allows for features such as remote
shutdown, remote reset, payload voltage monitoring, temperature monitoring, and access to
Field Replaceable Unit (FRU) data.
PCI/PCIe:
The PCI bus allows for read/write memory access between the MPC8548 processor, Ethernet
switch, and Cavium processors. The four lane PCI Express
®
(PCIe) routes between the
MPC8548 and the optional RTM.
Real-time Clock:
The STMicroelectronics M41T00S RTC provides counters for seconds, minutes, hours, day,
date, month, years, and century. The M41T00S serial interface supports I
2
C bus and has a
super-cap backup capable of maintaining the clock for a minimum of two hours.
Software:
The Cavium CN5860 processor provides a GNU compiler that implements the MIPS64 Rel 2
instruction set in addition to the specialized instructions and a Linux
®
Board Specific Package
(BSP) including the IP-stack optimization. The CN5860 also provides libraries that take
advantage of the chip’s hardware acceleration for certain security protocols.
RTM (optional):
This blade supports a custom Rear Transition Module (RTM) with the following I/O:
Up to six 10GbE connections
One x4 PCI Express port from the MPC8548