Table 8-21, Cpuid instruction codes with eax = 80000001h – AMD Geode LX [email protected] User Manual
Page 630
630
AMD Geode™ LX Processors Data Book
Instruction Set
33234H
Table 8-21. CPUID Instruction Codes with EAX = 80000001h
Register
Reset
Value
Description
Comment
EAX[31:28]
0x0
Reserved
EAX[27:20]
0x00
Extended Family
EAX[19:16]
0x00
Extended Model
EAX[15:12]
0x0
Reserved
EAX[11:8]
0x5
Processor/Instruction Family
EAX[7:4]
0x5
Processor Model
EAX[3:0]
0x2
Processor Stepping
May change with CPU revision
EDX[31]
1
3DN. 3DNow! Instruction Set
EDX[30]
1
3DE. 3DNow! Instruction Set Extension
EDX[29]
0
LM. Long mode
Not supported
EDX[28:25]
0000
Reserved
Not supported
EDX[24]
0
FXSR/FXRSTOR. Fast FP Save and Restore
Not supported
EDX[23]
1
MMX. MMX Instruction Set and Architecture
EDX[22]
1
AMMX. AMD MMX Instruction Extension
EDX[21]
0
Reserved
EDX[20]
0
NX. No-execute page protection
Not supported
EDX[19]
0
MP. Multiprocessing capability
Not supported
EDX[18]
0
Reserved
EDX[17]
0
PSE36. 36-Bit Page Size Extensions
Not supported
EDX[16]
0
PAT. Page Attribute Table
Not supported
EDX[15]
1
CMOV. Conditional Move Instruction (CMOV,
FCMOV, FCOMI)
EDX[14]
0
MCA. Machine Check Architecture
Not supported
EDX[13]
1
PGE. Page Global Enable Feature
EDX[12]
0
MTRR. Memory Type Range Registers
Not supported
EDX[11]
0
ASEP. Syscall/Sysret Instruction
EDX[10]
0
Reserved
EDX[9]
0
APIC. Advanced Programmable Interrupt Control-
ler
Not supported
EDX[8]
1
CX8. Compare Exchange (CMPXCHG8B)
Instruction
EDX[7]
0
MCE. Machine Check Exception
Not supported
EDX[6]
0
PAE. Page Address Extension
Not supported
EDX[5]
1
MSR. Model Specific Registers via
RDMSR/WRMSR Instructions
EDX[4]
1
TSC. Time Stamp Counter and RDTSC
Instruction
EDX[3]
1
PSE. 4MB Page Size Extension
EDX[2]
1
DE. Debugging Extension
EDX[1]
0
VME. Virtual Interrupt Flag in VM86
Not supported
EDX[0]
1
FPU. Floating Point Unit On Chip