beautypg.com

2 gliu register descriptions, Gliu register descriptions, Table 4-5 – AMD Geode LX [email protected] User Manual

Page 50: Table 4-6, Gliu specific msrs summary

background image

50

AMD Geode™ LX Processors Data Book

GLIU Register Descriptions

33234H

4.2

GLIU Register Descriptions

All GeodeLink™ Interface Unit (GLIU) registers are Model
Specific Registers (MSRs) and are accessed through the
RDMSR and WRMSR instructions.

The registers associated with the GLIU are the Standard
GeodeLink Device (GLD) MSRs, GLIU Specific MSRs.
GLIU Statistic and Comparator MSRs,

P2D Descriptor

MSRs, and I/O Descriptor MSRs. The tables that follow are

register summary tables that include reset values and page
references where the bit descriptions are provided.

Note:

The MSR address is derived from the perspective
of the CPU Core. See Section 4.1 "MSR Set" on
page 45 f
or more details on MSR addressing.

Reserved (RSVD) fields do not have any meaningful stor-
age elements. They always return 0.

Table 4-5. GeodeLink™ Device Standard MSRs Summary

MSR Address

Type

Register Name

Reset Value

Reference

GLIU0: 10002000h
GLIU1: 40002000h

RO

GLD Capabilities MSR (GLD_MSR_CAP)

00000000_000014xxh

Page 55

GLIU0: 10002001h
GLIU1: 40002001h

R/W

GLD Master Configuration MSR
(GLD_MSR_CONFIG)

GLIU0:

00000000_00000002h

GLIU1:

00000000_00000004h

Page 55

GLIU0: 10002002h
GLIU1: 40002002h

R/W

GLD SMI MSR (GLD_MSR_SMI)

00000000_00000001h

Page 56

GLIU0: 10002003h
GLIU1: 40002003h

R/W

GLD Error MSR (GLD_MSR_ERROR)

00000000_00000000h

Page 57

GLIU0: 10002004h
GLIU1: 40002004h

R/W

GLD Power Management MSR
(GLD_MSR_PM)

00000000_00000000h

Page 59

GLIU0: 10002005h
GLIU1: 40002005h

R/W

GLD Diagnostic MSR (GLD_MSR_DIAG)

00000000_00000000h

Page 60

Table 4-6. GLIU Specific MSRs Summary

MSR Address

Type

Register Name

Reset Value

Reference

GLIU0: 10000080h
GLIU1: 40000080h

R/W

Coherency (COH)

Configuration Dependent

Page 60

GLIU0: 10000081h
GLIU1: 40000081h

R/W

Port Active Enable (PAE)

Boot Strap Dependent

Page 61

GLIU0: 10000082h
GLIU1: 40000082h

R/W

Arbitration (ARB)

10000000_00000000h

Page 62

GLIU0: 10000083h
GLIU1: 40000083h

R/W

Asynchronous SMI (ASMI)

00000000_00000000h

Page 62

GLIU0: 10000084h
GLIU1: 40000084h

R/W

Asynchronous ERR (AERR)

00000000_00000000h

Page 63

GLIU0: 10000086h
GLIU1: 40000086h

R/W

GLIU Physical Capabilities (PHY_CAP)

GLIU0:

20291830_010C1086h

GLIU1:

20311030_0100400Ah

Page 65

GLIU0: 10000087h
GLIU1: 40000087h

RO

N Outstanding Response (NOUT_RESP)

00000000_00000000h

Page 66

GLIU0: 10000088h
GLIU1: 40000088h

RO

N Outstanding Write Data (NOUT_WDATA)

00000000_00000000h

Page 67

This manual is related to the following products: