AMD Geode LX 800@0.9W - Manual (Page 100)

100 AMD Geode™ LX Processors Data Book
CPU Core Register Descriptions 33234H
00001110h RO IF Sequential Count MRS (IF_SEQCOUNT_MSR) 00000000_00000000h Page 122
00001140h RO IF Built-In Self-Test MSR (IF_BIST_MSR) 00000000_00000000h Page 123
00001210h R/W Exception Unit (XC) Configuration MSR
(XC_CONFIG_MSR) 00000000_00000000h Page 124
00001211h R/W XC Mode MSR (XC_MODE_MSR) 00000000_00000000h Page 125
00001212h RO XC History MSR (XC_HIST_MSR) 00000000_00000000h Page 126
00001213h RO XC Microcode Address MSR (XC_UADDR_MSR) 00000000_00000000h Page 127
00001250h R/W ID Configuration MSR (ID_CONFIG_MSR) 00000000_00000002h Page 127
00001301h R/W SMM Control MSR (SMM_CTL_MSR) 00000000_00000000h Page 128
00001302h R/W Debug Management Interrupt (DMI) Control Reg-
ister 00000000_00000000h Page 129
00001310h R/W Temporary 0 MSR (TEMP0_MSR) xxxxxxxx_xxxxxxxxh Page 130
00001311h R/W Temporary 1 MSR (TEMP1_MSR) xxxxxxxx_xxxxxxxxh Page 130
00001312h R/W Temporary 2 MSR (TEMP2_MSR) xxxxxxxx_xxxxxxxxh Page 130
00001313h R/W Temporary 3 MSR (TEMP3_MSR) xxxxxxxx_xxxxxxxxh Page 130
00001320h R/W ES Segment Selector/Flags Register
(ES_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
00001321h R/W CS Segment Selector/Flags Register
(CS_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
00001322h R/W SS Segment Selector/Flags Register
(SS_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
00001323h R/W DS Segment Selector/Flags Register
(DS_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
00001324h R/W FS Segment Selector/Flags Register
(FS_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
00001325h R/W GS Segment Selector/Flags Register
(GS_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
00001326h R/W LDT Segment Selector/Flags Register
(LDT_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
00001327h R/W Temp Segment Selector/Flags Register
(TM_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
00001328h R/W TSS Segment Selector/Flags Register
(TSS_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
00001329h R/W IDT Segment Selector/Flags Register
(IDT_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
0000132Ah R/W GDT Segment Selector/Flags Register
(GDT_SEL_MSR) xxxxxxxx_xxxxxxxxh Page 131
0000132Bh R/W SMM Header MSR (SMM_HDR_MSR) 00000000_00000000h Page 132
0000132Ch R/W DMM Header MSR (DMM_HDR_MSR) 00000000_00000000h Page 133
00001330h R/W ES Segment Base/Limit MSR (ES_BASE_MSR) xxxxxxxx_xxxxxxxxh Page 134
00001331h R/W CS Segment Base/Limit MSR (CS_BASE_MSR) xxxxxxxx_xxxxxxxxh Page 134
00001332h R/W SS Segment Base/Limit MSR (SS_BASE_MSR) xxxxxxxx_xxxxxxxxh Page 134
00001333h R/W DS Segment Base/Limit MSR (DS_BASE_MSR) xxxxxxxx_xxxxxxxxh Page 134
00001334h R/W FS Segment Base/Limit MSR (FS_BASE_MSR) xxxxxxxx_xxxxxxxxh Page 134
Table 5-13. CPU Core Specific MSRs Summary (Continued)
MSR
Address Type Register Name Reset Value Reference