Figure 7-6, Table 7-10, Vip interface signals – AMD Geode LX [email protected] User Manual
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610
AMD Geode™ LX Processors Data Book
Electrical Specifications
33234H
Figure 7-6. Drive Level and Measurement Points for Switching Characteristics
Table 7-10. VIP Interface Signals
Symbol
Parameter
Min
Max
Unit
Comments
t
CK
VIPCLK period
12.5
ns
80 MHz
t
CH
VIPCLK High time
3.0
ns
45% t
CK
t
CL
VIPCLK Low time
3.0
ns
45% t
CK
t
VAL
VIP_SYNC Output Valid Delay time from VIPCLK
1.0
4.0
ns
t
SU1
VID[7:0] Input Setup time to VIPCLK
2.0
ns
t
H1
VID[7:0] Input Hold time from VIPCLK.
0.2
ns
VIPCLK
Outputs
Inputs
50%
Valid Input
Valid Output
n+1
Valid Output
n
50%
50%
t
VAL1,2
Min
t
VAL1,2
Max
t
SU1,2
t
H1,2
t
CK
t
CH
t
CL
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