AMD Geode LX [email protected] User Manual
Page 181
AMD Geode™ LX Processors Data Book
181
CPU Core Register Descriptions
33234H
7
RSVD (RO)
Reserved (Read Only).
6
DIRTY
Dirty Flag. A 1 indicates that the page has been written to.
5
ACC
Accessed Flag. A 1 indicates an entry in the TLB.
4
CD
Cache Disable Flag. A 1 indicates that the page is uncacheable.
3
WT_BR
Write-Through/Write Burst Flag. When the page is cacheable, a 1 indicates that the
page is write-through. When the page is non-cacheable, a 1 indicates that the page
allows write bursting.
2
US
User Access Privileges.
0: Supervisor.
1: User.
1
WR
Writable Flag.
0: Page can not be written.
1: Page can be written.
0
VALID
Valid Bit. A 1 indicates that the entry in the TLB is valid.
If SEL bits in L2TLB_INDEX MSR = 1x (MSR 0000189Ch[17:16] = 1x)
63:44
LINADDR
Linear Address. Address [32:22].
53:32
RSVD (RO)
Reserved (Read Only).
31:12
PHYSADDR
Physical Address. Address [32:12]
11:9
RSVD (RO)
Reserved (Read Only).
8
GLOBAL
Global Page Flag. A 1 indicates a global page.
7
4MPTE
4M PTE Flag.
0: DTE access.
1: 4M PTE access.
6
DIRTY
Dirty Flag. A 1 indicates that the page has been written to.
5
ACC
Accessed Flag. A 1 indicates an entry in the TLB.
4
CD
Cache Disable Flag. A 1 indicates that the page is uncacheable.
3
WT
Write-through Flag. A 1 indicates that the page is write-through.
2
US
User Access Privileges.
0: Supervisor.
1: User.
1
WR
Writable Flag.
0: Page can not be written.
1: Page can be written.
0
VALID
Valid Bit. A 1 indicates that the entry in the TLB is valid.
L2TLB_ENTRY_MSR Bit Descriptions (Continued)
Bit
Name
Description