11 vbi control registers, 1 dc vbi even control (dc_vbi_even_ctl), 09ch – AMD Geode LX [email protected] User Manual
Page 344: Xxxxxxxxh, 0a0h, Dc vbi even control (dc_vbi_even_ctl)
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AMD Geode™ LX Processors Data Book
Display Controller Register Descriptions
33234H
6.6.10.4 DC Filter Coefficient Data Register 2 (DC_FILT_COEFF2)
Any read or write of this register causes a read or write of the horizontal or filter coefficient RAM. If this occurs while the dis-
play is active, improper filtering of an output pixel can occur, which may cause temporary visual artifacts (speckling). To
avoid this, either disable the display or avoid accessing this register unless during vertical blank.
6.6.11
VBI Control Registers
6.6.11.1 DC VBI Even Control (DC_VBI_EVEN_CTL)
Settings written to this register do not take effect until the start of the following frame or interlaced field.
DC Memory Offset 09Ch
Type
R/W
Reset Value
xxxxxxxxh
DC_FILT_COEFF2 Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RSVD
TAP5
TAP4
DC_FILT_COEFF2 Bit Descriptions
Bit
Name
Description
31:20
RSVD
Reserved. Set to 0. This field is used only when reading or writing the Line Buffer Regis-
ter.
19:10
TAP5
Tap 5 Coefficient. This coefficient is used for the fifth tap (rightmost) in the horizontal fil-
ter.
9:0
TAP4
Tap 4 Coefficient. This coefficient is used for the fourth tap (second from the right) in the
horizontal filter.
DC Memory Offset 0A0h
Type
R/W
Reset Value
xxxxxxxxh
DC_VBI_EVEN_CTL Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
VBI_SIG_EN
VB
I_16
VBI_UP
VBI_ENA
VBI_EVEN_OFFSET
0
DC_VBI_EVEN_CTL Bit Descriptions
Bit
Name
Description
31
VBI_SIG_EN
VBI Signature Enable. This bit allows the CRC engine at the output of the DC to be
used to check VBI data instead of graphics data. When this bit is set, the CRC is gener-
ated based only on VBI data; when cleared, only graphics data is used for the CRC cal-
culation.
30
VBI_16
VBI 16-bit Enable. When set, VBI data is sent 16 bits per Dot clock. When clear, VBI
data is sent 8 bits per Dot clock.
29
VBI_UP
VBI Upscale. When set, the VBI data is upscaled by 2. This is accomplished by repeat-
ing data twice.