Artesyn Centellis 4100 Installation and Use (2015) - Manual (Page 161)

Non-Field-Replaceable Units
Centellis 4100 Installation and Use (6806800D82E) 163
5.2.4 Synchronization Clock Interface
The synchronization clock interface residing on the P20 connector is always bussed between
all slots. It provides a set of clock buses to support applications that require the exchange of
synchronous timing information among multiple blades in a shelf. The clocks are connected in
a ring topology to all slots of the backplane and terminated at both ends by connector JC
located on the bottom right-hand front side of the backplane.
The synchronization clock interface is fully compliant to the PICMG 3.0, R1.0 Specification.
Therefore, details are not described within this chapter.
All interfaces are routed between adjacent slots.