Artesyn ATCA-7470 Installation and Use (October 2014) - Manual (Page 195)

Maps and Registers
ATCA-7470 Installation and Use (6806800P15K) 195
6.4.28 Scratch Registers
Table 6-72 IPMC BIOS Communication Register 1
Address Offset: 0x7A
Bit Description Default Access
7:0 IPMC BIOS
Communication bits PWR_GOOD:0 LPC: r/w
IPMC: r/w
Table 6-73 IPMC BIOS Communication Register 2
Address Offset: 0x7B
Bit Description Default Access
7:0 IPMC BIOS
Communication bits PWR_GOOD:0 LPC: r/w
IPMC: r/w
Table 6-74 IPMC BIOS Communication Register 3
Address Offset: 0x7C
Bit Description Default Access
7:0 IPMC BIOS
Communication bits PWR_GOOD:0 LPC: r/w
IPMC: r/w
Table 6-75 LPC Scratch Register
Address Offset: 0x7D
Bit Description Default Access
7:0 LPC Scratch bits PWR_GOOD:0 LPC: r/w
IPMC: r