Artesyn ATCA-7470 Installation and Use (October 2014) - Manual (Page 194)

Maps and Registers
ATCA-7470 Installation and Use (6806800P15K) 194
6 MII Management Interface Operation Bit:
0: Write operation
1: Read operation - w
MII Management Interface Busy indication:
0: The interface is ready and accepts new transactions
1: The interface is busy. The MII transaction is still in progress. 0 r
7 Preamble Control Bit
0: Start transaction without leading 1 bits (Preamble
disabled)
1: Start transaction with 32 1 bits (Preamble enabled) 0 r/w
Table 6-70 MII Management Interface Lower Byte Register
Address Offset: 0x72
Bit Description Default Access
7:0 Lower Data Byte 0 LPC: r/w
Table 6-71 MII Management Interface Upper Byte Register
Address Offset: 0x73
Bit Description Default Access
7:0 Upper Data Byte 0 LPC: r/w
Table 6-69 MII Management Interface Control and Address Register (continued)
Address Offset: 0x71
Bit Description Default Access