1 marvel switch initialization, Figure 5-3, Fpga to marvel 88e6161 base-interface connection – Artesyn ATCA-7470 Installation and Use (October 2014) User Manual
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Functional Description
ATCA-7470 Installation and Use (6806800P15K)
130
The Marvell 88E6161 generates an interrupt when link status of the base interface is changed.
The interrupt handler (IPMC or Payload) will read the link status of the Base Ethernet via MDIO
(SMI) interface, and enable/disable the corresponding physical link to the CaveCreek's Ethernet
device. The payloads Ethernet driver will detect the link change and can propagate this
information. MDIO Interface can be implemented as Bit Bang Interface or FPGA can handle the
Interface.
5.6.1.1
Marvel Switch Initialization
Enable Marvel Switch Interrupt generation for Base 1 and Base 2 (example, P0 and P1): Copper
Specific Interrupt PHY Register Page 0 Register 18, Bit 10 Link Status Changed Interrupt Enable.
PHY Port 0,1 Led0 configured for Mode 000 (On-Link, Off-No Link) PHY Register Page 3
Register 16 Bits 3:0, LED Function Control Register.
Figure 5-3
FPGA to Marvel 88E6161 Base-Interface connection