Artesyn ATCA-7470 Installation and Use (October 2014) - Manual (Page 159)

Maps and Registers
ATCA-7470 Installation and Use (6806800P15K) 159
6.4.10.3 BIOS IPMC Watchdog Timeout Register
When one of the IPMC Watchdog Timeout bit of IPMC Watchdog Timeout Register is set, the
corresponding BIOS IPMC Watchdog Timeout bit is set. The BIOS clears this status bit by
writing 1.
2 PB_RST_ face plate push button reset
1: enabled
0: disabled Ext.: FACE_PB_EN
1: (SW3.3 is OFF)
0: (SW3.3 is ON) r/w
3 Reserved 0 r
4 RTM_PB_RST_ Reset key at RTM
1: enabled
0: disabled Ext.: FACE_PB_EN
1: (SW3.3 is OFF)
0: (SW3.3 is ON) r/w
7:5 Reserved 0 r
Table 6-20 Reset Mask Register (continued)
Address Offset: 0x11
Bit Description Default Access
OS should never write to this register.
Table 6-21 BIOS IPMC Watchdog Timeout Register
Address Offset: 0x12
Bit Description Default Access
0 BIOS IPMC Watchdog Timeout:
1: IPMC Watchdog Timeout occurred PWR_GOOD:0 LPC: r/w1c
IPMC: r
1 BIOS IPMC Pre-Timeout
1: IPMC Pre-Timeout occurred PWR_GOOD:0 LPC: r/w1c
IPMC: r
7:2 Reserved 0 r