Artesyn ATCA-7470 Installation and Use (October 2014) - Manual (Page 152)

Maps and Registers
ATCA-7470 Installation and Use (6806800P15K) 152
0x44-0x47 - - Reserved / Not used
0x48 x x Update Channel Equalization Control Register
0x49 x - IPMC E-Keying Status Register
0x4A x x IPMC E-Keying Control Register
0x50 x x LED Status and Control Register
0x51 x x CPLD Revision Register
0x52 x x Spare Signals Status Register
0x53 x x DIMM Event Register
0x54 x x CPU Type and Presence Detection Register
0x55 x x Memory Temperature Status Register
0x56 x x Base Interface Link Status Signals Register
0x57 x x Miscellaneous Status/Control Register
0x58 -0x5B - - Reserved / Not used
0x5C - 0x6F x - Telecom Clock control and supervision Registers
0x70 x - MII Management Interface PHY Address Register.
0x71 x - MII Management Interface Control and Address Register
0x72 x - MII Management Interface Lower Byte Register
0x73 x - MII Management Interface Upper Byte Register
0x74 - 0x79 - - Reserved / Not used
0x7A - 0x7C x x IPMC - BIOS Communication Registers
0x7D x x LPC Scratch Register.
0x7E x x IPMC Scratch Register.
0x7F x x POST codes from host
1. For LPC I/O accesses add the LPC I/O Base Address 0x600
Table 6-9 FPGA Register Map Overview (continued)
Address
Offset
1
LPC I/O
IPMC
SPI
Description