Artesyn ATCA-7470 Installation and Use (October 2014) - Manual (Page 146)

Maps and Registers
ATCA-7470 Installation and Use (6806800P15K) 146
The following block diagram shows the functional units inside the Glue Logic FPGA:
6.3 Registers
For register description, the convention shown in Table 1 Register Default and Table 2 Register
Access Type are used.
Figure 6-2 Glue Logic FPGA Block Diagram
Table 6-4 Register Default
Default Description
- Not applicable or undefined
0 or 1 Default value after PWR_GOOD is valid or after PCH_PLTRST_
deassertion.
Undef. Undefined value
: 0 or 1 Default value after deassertion of the reset signal