Artesyn ATCA-7470 Installation and Use (October 2014) - Manual (Page 144)

Maps and Registers
ATCA-7470 Installation and Use (6806800P15K) 144
In APIC mode the PCI Interrupts A:H are mapped to IRQ[16:23].
When programming the polarity of internal interrupt sources on the APIC, interrupts 0 through
15 receive active-high internal interrupt sources; interrupts 16 through 23 receive active-low
internal interrupt sources.
If an interrupt is used for PCI IRQ[A:H], SCI, or TCO, it must not be used for ISA (legacy)-style
interrupts (via SERIRQ).
6.1.3 NMI Generation
The Intel Cavecreek PCH can generate Non-Maskable Interrupts (NMIs) by several sources
which are described In the following table:
21 N/A PIRQ[F]# 1 Yes Option for SCI, TCO, and HPET #0,1,2,3. For
other internal devices are routable.
22 N/A PIRQ[G]#1 Yes Option for SCI, TCO, and HPET #0,1,2,3. For
other internal devices are routable.
23 N/A PIRQ[H]# 1 Yes Option for SCI, TCO, and HPET #0,1,2,3. For
other internal devices are routable.
Table 6-2 APIC Mode Interrupt Mapping (continued)
IRQ
Via
SERIRQ Direct from
Pin Via PCI
Message
Interrupt Source
Table 6-3 NMI Sources
Cause of NMI Comment
SERR# goes active (either internally, externally
via SERR# signal, or via message from
SandyBridge-EP For example, SERR# message from SandyBridge-
EP due to memory ECC errors can instead be
routed to generate an SCI, through the
NMI2SCI_EN bit (Device 31:Function 0, TCO Base
+ 08h, bit 11).