Artesyn ATCA-7470 Installation and Use (October 2014) - Manual (Page 171)

Maps and Registers
ATCA-7470 Installation and Use (6806800P15K) 171
6.4.11.6 Base Interface Link Interrupt Status Register
Every change on External Link status signals generate interrupt for CPU. These interrupts must
be handled and cleared in the following register by BIOS.
6.4.12 PCI Express Hot Plug I2C IO Expander Registers
Each CPU supports four PCI Express Hot Plug ports. The Hot Plug registers for CPU0 are
mapped to 0x30 to 0x37 and the registers for CPU 1 are mapped to 0x38 - 0x3F.
6:5 An external Interrupt Signal CPU_IRQ_X_ is used.
Only used when IRQ Frame Number is 0x00:
0x0: Interrupt is masked (disabled).
0x1: Map Interrupt to CPU_IRQ_A_
0x2: Map Interrupt to CPU_IRQ_B_
0x3:Reserved 0 LPC:r/ w
7 Reserved 0 r
Table 6-34 Interrupt Mask and Map Registers (continued)
Address Offset: 0x23 - 0x2E
Bit Description Default Access
Table 6-35 Base Link Interrupt Status Register
Address Offset: 0x2F
Bit Description Default Access
0 Base Interface 1 Link loss Interrupt occurred
0: No Interrupt
1: Link Status changed 0. LPC: r/w1c
1 Base Interface 2 Link loss Interrupt occurred
0: No Interrupt
1: Link Status changed 0 LPC: r/w1c
7:2 Reserved 0 LPC: r