Altera DisplayPort MegaCore Function - Manual (Page 5)

DPTX_MST_VCPTAB0...............................................................................................................9-15
DPTX_MST_VCPTAB1...............................................................................................................9-15
DPTX_MST_VCPTAB2...............................................................................................................9-16
DPTX_MST_VCPTAB3...............................................................................................................9-17
DPTX_MST_VCPTAB4...............................................................................................................9-17
DPTX_MST_VCPTAB5...............................................................................................................9-18
DPTX_MST_VCPTAB6...............................................................................................................9-18
DPTX_MST_VCPTAB7...............................................................................................................9-19
DPTX_MST_TAVG_TS...............................................................................................................9-20
Source AUX Controller Interface............................................................................................................9-20
DPTX_AUX_CONTROL.............................................................................................................9-20
DPTX_AUX_CMD....................................................................................................................... 9-21
DPTX_AUX_BYTE0.....................................................................................................................9-22
DPTX_AUX_BYTE1.....................................................................................................................9-22
DPTX_AUX_BYTE2.....................................................................................................................9-22
DPTX_AUX_BYTE3.....................................................................................................................9-23
DPTX_AUX_BYTE4.....................................................................................................................9-23
DPTX_AUX_BYTE5.....................................................................................................................9-23
DPTX_AUX_BYTE6.....................................................................................................................9-24
DPTX_AUX_BYTE7.....................................................................................................................9-24
DPTX_AUX_BYTE8.....................................................................................................................9-24
DPTX_AUX_BYTE9.....................................................................................................................9-25
DPTX_AUX_BYTE10...................................................................................................................9-25
DPTX_AUX_BYTE11...................................................................................................................9-25
DPTX_AUX_BYTE12...................................................................................................................9-26
DPTX_AUX_BYTE13...................................................................................................................9-26
DPTX_AUX_BYTE14...................................................................................................................9-27
DPTX_AUX_BYTE15...................................................................................................................9-27
DPTX_AUX_BYTE16...................................................................................................................9-27
DPTX_AUX_BYTE17...................................................................................................................9-28
DPTX_AUX_BYTE18...................................................................................................................9-28
DPTX_AUX_RESET.....................................................................................................................9-28
Source-Supported DPCD Locations....................................................................................................... 9-29
DisplayPort Sink Register Map and DPCD Locations..................................... 10-1
Sink General Registers...............................................................................................................................10-1
DPRX_RX_CONTROL.................................................................................................................10-1
DPRX_RX_STATUS..................................................................................................................... 10-3
DPRX_BER_CONTROL.............................................................................................................. 10-5
DPRX_BER_CNT0........................................................................................................................10-7
DPRX_BER_CNT1........................................................................................................................10-7
Sink Timestamp......................................................................................................................................... 10-7
Sink Bit-Error Counters............................................................................................................................10-7
DPRX_BER_CNTI0...................................................................................................................... 10-7
DPRX_BER_CNTI1...................................................................................................................... 10-8
Sink MSA Registers....................................................................................................................................10-8
DPRX0_MSA_MVID....................................................................................................................10-9
DPRX0_MSA_NVID.................................................................................................................... 10-9
TOC-5
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