Btc_dptx_syslib_monitor, Btc_dptx_test_autom, Btc_dptx_syslib_monitor -19 – Altera DisplayPort MegaCore Function User Manual
Page 120: Btc_dptx_test_autom -19
Description:
Initializes the system library. Should be invoked as the first function in the library
by
main(
)
. Set the base address of TX or RX to
BTC_NOT_PRESENT
if TX or RX
not instantiated.
Example:
btc_dptx_syslib_init( BITEC_DP_0_AV_TX_CONTROL_BASE, BITEC_DP_0_AV_
TX_CONTROL_IRQ_INTERRUPT_CONTROLLER_ID, BITEC_DP_0_AV_TX_CONTROL_
IRQ);
btc_dptx_syslib_monitor
Prototype:
int btc_dptx_syslib_monitor(void)
Thread-safe:
No
Available from ISR:
Yes
Include:
<
btc_dptx_syslib.h
>
Return:
0 = success, 1 = fail
Parameters:
No
Description:
This function calls the system library source housekeeping monitor. The
software should invoke this function periodically or at least every 50 ms.
Example:
btc_dptx_syslib_monitor();
btc_dptx_test_autom
Prototype:
int btc_dptx_test_autom(void)
Thread-safe:
No
Available from ISR:
Yes
Include:
<
btc_dptx_syslib.h
>
Return:
0 = success, 1 = fail
Parameters:
No
UG-01131
2015.05.04
btc_dptx_syslib_monitor
8-19
DisplayPort API Reference
Altera Corporation
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)